This paper presents a low rank compression technique which is used together with reluctance method and Schur complement to accelerate the performance of a PEEC-based solver. The system of linear equations which is achieved from the PEEC method is normally dense, therefore the coefficient matrix (MNA matrix) is sparsified using reluctance technique, and then Schur complement is applied on the MNA matrix which consists of separable blocks in order to form a new equation called Schur equation which is smaller in size than the original equation and hence it will be easier to be solved. Moreover, low rank compression is applied to compress the Schur matrix which will improve mostly the memory usage as well as solution time. Numerical results are demonstrated and discussed which are based on simulation of bus bars used in power frequency converters. The results show significant improvement in the performance while the overall error of the solution is kept to be around 10% when the reluctance matrix is sparsified up to 98%. However, due to the limitations of the proposed method, frequencies close to dc are not covered in this work.