This paper reports on investigation of the gate edge effect on the interface trap density characteristics of 3C-SiC MOS capacitors fabricated using four different gate materials and two SiO 2 oxide preparation methods. Non-uniform distribution of interface trap densities under the gate was demonstrated by the presence of the gate edge effect, i.e. the dependence of D it(E) on the ratio of gate perimeter to its area. The strength of the gate effect in different gate/oxide material combinations was studied and it was found that it depends on gate thermal expansion coefficient and adhesion of the gate layer to the oxide layer. The D it behaviour at shallow energy levels (0.25 eV) was attributed to the reaction of P b-centres to mechanical stress. The behaviour of D it at deeper levels was documented but could not be explained in this study.