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Evaluation of the drive circuit for a dual gate trench SiC JFET
KTH Royal Institute of Technology, Sweden; Warsaw University of Technology, Poland.
KTH Royal Institute of Technology, Sweden.
RISE, Swedish ICT, Acreo.
KTH Royal Institute of Technology, Sweden.
2013 (English)In: Materials Science Forum, Trans Tech Publications Ltd. , 2013, Vol. 740-742, p. 946-949Conference paper, Published paper (Refereed)
Abstract [en]

The paper discusses the switching performance of the dual gate trench SiC JFET. In applications such as dc/dc converters, when fast switching is expected the standard totem-pole driver is not sufficient. The reason for this is that both the internal resistance and the parasitic capacitances of this device are significantly higher than for other designs. Instead, the gate driver with a dynamic current source is proposed in this paper to speed-up the switching process. Performed double-pulse measurements show improved dynamic performance of the tested DGTJFET with the new driver.

Place, publisher, year, edition, pages
Trans Tech Publications Ltd. , 2013. Vol. 740-742, p. 946-949
Keywords [en]
Current-source, Dual-gate trench (DGT) JFET, Gate driver, SiC JFET, Switching performance, Capacitance, Junction gate field effect transistors, Silicon carbide, Switching, Timing circuits, Current sources, Dual gates, Gate drivers, DC-DC converters
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:ri:diva-47617DOI: 10.4028/www.scientific.net/MSF.740-742.946Scopus ID: 2-s2.0-84874061409ISBN: 9783037856246 (print)OAI: oai:DiVA.org:ri-47617DiVA, id: diva2:1462904
Conference
2 September 2012 through 6 September 2012, St. Petersburg
Available from: 2020-09-01 Created: 2020-09-01 Last updated: 2025-09-23Bibliographically approved

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