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  • 1.
    Baumann, Christoph
    et al.
    KTH Royal Institute of Technology, Sweden.
    Näslund, Mats
    Ericsson Research, Sweden.
    Gehrmann, Christian
    RISE, Swedish ICT, SICS, Security Lab.
    Schwarz, Oliver
    RISE, Swedish ICT, SICS, Security Lab.
    Thorsen, Hans
    T2 Data AB, Sweden.
    A High Assurance Virtualization Platform for ARMv82016In: 2016 European Conference on Networks and Communications (EuCNC), 2016, 9, p. 210-214, article id 7561034Conference paper (Refereed)
    Abstract [en]

    This paper presents the first results from the ongoing research project HASPOC, developing a high assurance virtualization platform for the ARMv8 CPU architecture. Formal verification at machine code level guarantees information isolation between different guest systems (e.g.~OSs) running on the platform. To use the platform in networking scenarios, we allow guest systems to securely communicate with each other via platform-provided communication channels and to take exclusive control of peripherals for communication with the outside world. The isolation is shown to be formally equivalent to that of guests executing on physically separate platforms with dedicated communication channels crossing the air-gap. Common Criteria (CC) assurance methodology is applied by preparing the CC documentation required for an EAL6 evaluation of products using the platform. Besides the hypervisor, a secure boot component is included and verified to ensure system integrity.

  • 2.
    Baumann, Christoph
    et al.
    Ericsson Research Security, Sweden.
    Schwarz, Oliver
    RISE - Research Institutes of Sweden, ICT, SICS.
    Dam, Mads
    KTH Royal Institute of Technology, Sweden.
    On the verification of system-level information flow properties for virtualized execution platforms2019In: Journal of Cryptographic Engineering, ISSN 2190-8508Article in journal (Refereed)
    Abstract [en]

    The security of embedded systems can be dramatically improved through the use of formally verified isolation mechanisms such as separation kernels, hypervisors, or microkernels. For trustworthiness, particularly for system-level behavior, the verifications need precise models of the underlying hardware. Such models are hard to attain, highly complex, and proofs of their security properties may not easily apply to similar but different platforms. This may render verification economically infeasible. To address these issues, we propose a compositional top-down approach to embedded system specification and verification, where the system-on-chip is modeled as a network of distributed automata communicating via paired synchronous message passing. Using abstract specifications for each component allows to delay the development of detailed models for cores, devices, etc., while still being able to verify high-level security properties like integrity and confidentiality, and soundly refine the result for different instantiations of the abstract components at a later stage. As a case study, we apply this methodology to the verification of information flow security for an industry-scale security-oriented hypervisor on the ARMv8-A platform and report on the complete verification of guest mode security properties in the HOL4 theorem prover.

  • 3.
    Blom, Rolf
    et al.
    RISE, Swedish ICT, SICS.
    Schwarz, Oliver
    RISE, Swedish ICT, SICS, Security Lab.
    High Assurance Security Products on COTS Platforms2015In: ERCIM News, ISSN 0926-4981, E-ISSN 1564-0094, no 102, p. 39-40Article in journal (Refereed)
    Abstract [en]

    With commodity operating systems failing to establish unbreakable isolation of processes, there is a need for stronger separation mechanisms. A recently launched open source project aims at applying virtualization to achieve such isolation on the widespread embedded ARM architectures. Strong assurance is established by formal verification and common criteria certification. Coexisting guest systems are able to run unmodified on the multicore platform, in a resource and cost efficient manner. The solution is rounded anchored in a secure boot process.

  • 4. Dam, Mads
    et al.
    Guanciale, Roberto
    Khakpour, Narges
    Nemati, Hamed
    Schwarz, Oliver
    RISE, Swedish ICT, SICS, Security Lab.
    Formal Verification of Information Flow Security for a Simple ARM-Based Separation Kernel2013Conference paper (Refereed)
    Abstract [en]

    A separation kernel simulates a distributed environment using a single physical machine by executing partitions in isolation and appropriately controlling communication among them. We present a formal verification of information flow security for a simple separation kernel for ARMv7. Previous work on information flow kernel security leaves communication to be handled by model-external means, and cannot be used to draw conclusions when there is explicit interaction between partitions. We propose a different approach where communication between partitions is made explicit and the information flow is analyzed in the presence of such a channel. Limiting the kernel functionality as much as meaning-fully possible, we accomplish a detailed analysis and verification of the system, proving its correctness at the level of the ARMv7 assembly. As a sanity check we show how the security condition is reduced to noninterference in the special case where no communication takes place. The verification is done in HOL4 taking the Cambridge model of ARM as basis, transferring verification tasks on the actual assembly code to an adaptation of the BAP binary analysis tool developed at CMU.

  • 5. Khakpour, Narges
    et al.
    Schwarz, Oliver
    RISE, Swedish ICT, SICS, Security Lab.
    Dam, Mads
    Machine Assisted Proof of ARMv7 Instruction Level Isolation Properties2013Conference paper (Refereed)
    Abstract [en]

    In this paper, we formally verify security properties of the ARMv7 Instruction Set Architecture (ISA) for user mode executions. To obtain guarantees that arbitrary (and unknown) user processes are able to run isolated from privileged software and other user processes, instruction level noninterference and integrity properties are provided, along with proofs that transitions to privileged modes can only occur in a controlled manner. This work establishes a main requirement for operating system and hypervisor verification, as demonstrated for the PROSPER separation kernel. The proof is performed in the HOL4 theorem prover, taking the Cambridge model of ARM as basis. To this end, a proof tool has been developed, which assists the verification of relational state predicates semi-automatically.

  • 6.
    Schwarz, Oliver
    et al.
    RISE, Swedish ICT, SICS, Security Lab. KTH Royal Institute of Technology, Sweden.
    Dam, Mads
    KTH Royal Institute of Technology, Sweden.
    Automatic Derivation of Platform Noninterference Properties2016In: Software Engineering and Formal Methods / [ed] Rocco De Nicola, Eva Kühn, 2016, 8, Vol. 9763, p. 27-44Conference paper (Refereed)
    Abstract [en]

    For the verification of system software, information flow properties of the instruction set architecture (ISA) are essential. They show how information propagates through the processor, including sometimes opaque control registers. Thus, they can be used to guarantee that user processes cannot infer the state of privileged system components, such as secure partitions. Formal ISA models - for example for the HOL4 theorem prover - have been available for a number of years. However, little work has been published on the formal analysis of these models. In this paper, we present a general framework for proving information flow properties of a number of ISAs automatically, for example for ARM. The analysis is represented in HOL4 using a direct semantical embedding of noninterference, and does not use an explicit type system, in order to (i) minimize the trusted computing base, and to (ii) support a large degree of context-sensitivity, which is needed for the analysis. The framework determines automatically which system components are accessible at a given privilege level, guaranteeing both soundness and accuracy.

  • 7.
    Schwarz, Oliver
    et al.
    RISE, Swedish ICT, SICS, Security Lab.
    Dam, Mads
    KTH Royal Institute of Technology, Sweden.
    Formal Verification of Secure User Mode Device Execution with DMA2014Conference paper (Refereed)
    Abstract [en]

    Separation between processes on top of an operating system or between guests in a virtualized environment is essential for establishing security on modern platforms. A key requirement of the underlying hardware is the ability to support multiple partitions executing on the shared hardware without undue interference. For modern processor architectures - with hardware support for memory management, several modes of operation and I/O interfaces - this is a delicate issue requiring deep analysis at both instruction set and processor implementation level. In a first attempt to rigorously answer this type of questions we introduced in previous work an information flow analysis of user program execution on an ARMv7 platform with hardware supported memory protection, but without I/O. The analysis was performed as a semi-automatic proof search procedure on top of an ARMv7 ISA model implemented in the Cambridge HOL4 theorem prover by Fox et al. The restricted platform functionality, however, makes the analysis of limited practical value. In this paper we add support for devices, including DMA, to the analysis. To this end, we propose an approach to device modeling based on the idea of executing devices nondeterministically in parallel with the (single-core) deterministic processor, covering a fine granularity of interactions between the model components. Based on this model and taking the ARMv7 ISA as an example, we provide HOL4 proofs of several noninterference-oriented isolation properties for a partition executing in the presence of devices which potentially use DMA or interrupts.

  • 8.
    Schwarz, Oliver
    et al.
    RISE, Swedish ICT, SICS, Security Lab.
    Gehrmann, Christian
    RISE, Swedish ICT, SICS, Security Lab.
    Securing DMA through Virtualization2012In: IEEE Conference on Complexity in Engineering, IEEE , 2012, 20Conference paper (Refereed)
    Abstract [en]

    We present a solution for preventing guests in a virtualized system from using direct memory access (DMA) to access memory regions of other guests. The principles we suggest, and that we also have implemented, are purely based on software and standard hardware. No additional virtualization hardware such as an I/O Memory Management Unit (IOMMU) is needed. Instead, the protection of the DMA controller is realized with means of a common ARM MMU only. Overhead occurs only in pre- and postprocessing of DMA transfers and is limited to a few microseconds. The solution was designed with focus on security and the abstract concept of the approach was formally verified.

  • 9.
    Schwarz, Oliver
    et al.
    RISE, Swedish ICT, SICS, Security Lab.
    Gehrmann, Christian
    RISE, Swedish ICT, SICS, Security Lab.
    Do, Viktor
    RISE, Swedish ICT, SICS.
    Affordable Separation on Embedded Platforms: Soft Reboot Enabled Virtualization on a Dual Mode System2014Conference paper (Refereed)
    Abstract [en]

    While security has become important in embedded systems, commodity operating systems often fail in effectively separating processes, mainly due to a too large trusted computing base. System virtualization can establish isolation already with a small code base, but many existing embedded CPU architectures have very limited virtualization hardware support, so that the performance impact is often non-negligible. Targeting both security and performance, we investigate an approach in which a few minor hardware additions together with virtualization offer protected execution in embedded systems while still allowing non-virtualized execution when secure services are not needed. Benchmarks of a prototype implementation on an emulated ARM Cortex A8 platform confirm that switching between those two execution forms can be done efficiently.

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