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Analysis of the Thermo-mechanical Performance of Double-Sided Cooled Power Modules
KTH Royal Institute of Technology, Sweden.
KTH Royal Institute of Technology, Sweden.
RISE Research Institutes of Sweden, Digital Systems, Smart Hardware.ORCID iD: 0000-0002-5027-3491
KTH Royal Institute of Technology, Sweden.
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2024 (English)In: 2024 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024, Institute of Electrical and Electronics Engineers Inc. , 2024Conference paper, Published paper (Refereed)
Abstract [en]

Double-sided cooled (DSC) power semiconductor modules have garnered increased interest over the past decade due to their ability to offer an additional path for heat removal, facilitating higher power density operation while reducing junction temperatures and thermal stresses. Nevertheless, when operating at similar junction temperatures, DSC modules might exhibit elevated thermo-mechanical stress compared to single-sided cooled (SSC) modules. This increase can be attributed to restricted vertical movement within the DSC modules. Furthermore, the integration of various spacers within the DSC modules, which enable bond wire connections to gate terminals, can significantly influence both the thermal performance and induced thermo-mechanical stresses. Depending on the materials used in the spacer, the thermal performance and thermo-mechanical stresses inside the module can vary. In this study, we have first analysed the thermal performance of the DSC power modules employing different spacers. Following that, we have also performed thermo-mechanical analysis in different solder layers. Finally, fatigue analysis is done to demonstrate the weakest solder layer inside the package.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc. , 2024.
Keywords [en]
Finite element method; Reliability analysis; Semiconductor junctions; Double sided; Double-sided cool; Finite element; Junction temperatures; Power module; Power semiconductor module; Solder layers; Thermal Performance; Thermo-mechanical performance; Thermo-mechanical stress; Junction temperature
National Category
Mechanical Engineering
Identifiers
URN: urn:nbn:se:ri:diva-73345DOI: 10.1109/EuroSimE60745.2024.10491556Scopus ID: 2-s2.0-85191151239OAI: oai:DiVA.org:ri-73345DiVA, id: diva2:1861508
Conference
25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024. Catania, Italy. 7 April 2024 through 10 April 2024
Note

The project is supported by the Chips Joint Undertaking and its members, including the top-up funding by the national Authorities of Germany, Belgium, Spain, Sweden, Netherlands, Austria, Italy, Greece, Latvia, Finland, Hungary, Romania and Switzerland, under grant agreement number 101096387. Cofunded by European Union.

Available from: 2024-05-28 Created: 2024-05-28 Last updated: 2024-05-28Bibliographically approved

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Kostov, Konstantin Stoychev

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