Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
One Bit is (Not) Enough: An Empirical Study of the Impact of Single and Multiple Bit-Flip Errors
Chalmers University of Technology, Sweden.ORCID iD: 0000-0001-9536-4269
2017 (English)In: Proceedings - 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2017, Institute of Electrical and Electronics Engineers Inc. , 2017, p. 97-108Conference paper, Published paper (Refereed)
Abstract [en]

Recent studies have shown that technology and voltage scaling are expected to increase the likelihood that particle-induced soft errors manifest as multiple-bit errors. This raises concerns about the validity of using single bit-flips for assessing the impact of soft errors in fault injection experiments. The goal of this paper is to investigate whether multiple-bit errors could cause a higher percentage of silent data corruptions (SDCs) compared to single-bit errors. Based on 2700 fault injection campaigns with 15 benchmark programs, featuring a total of 27 million experiments, our results show that single-bit errors in most cases yields a higher percentage of SDCs compared to multiple-bit errors. However, in 8% of the campaigns we observed a higher percentage of SDCs for multiple-bit errors. For most of these campaigns, the highest percentage of SDCs was obtained by flipping at most 3 bits. Moreover, we propose three ways of pruning the error space based on the results. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc. , 2017. p. 97-108
Keywords [en]
error space pruning, fault injection, single/multiple bit-flip errors, transient hardware faults, Bit error rate, Radiation hardening, Software testing, Voltage scaling, Benchmark programs, Bit-flips, Empirical studies, Hardware faults, Particle-induced soft errors, Silent data corruptions, Single bit flips, Errors
National Category
Natural Sciences
Identifiers
URN: urn:nbn:se:ri:diva-56955DOI: 10.1109/DSN.2017.30Scopus ID: 2-s2.0-85031671337ISBN: 9781538605417 (print)OAI: oai:DiVA.org:ri-56955DiVA, id: diva2:1612789
Conference
47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2017, 26 June 2017 through 29 June 2017
Note

Funding details: Natural Sciences and Engineering Research Council of Canada; Funding details: Canada Foundation for Innovation; Funding text 1: This work was supported in part by the Natural Sciences and Engineering Research Council of Canada (NSERC), the Canada Foundation for Innovation (CFI), the EU funded HiPEAC (High Performance and Embedded Architectures and Compilers) Network of Excellence and the Ericsson Research Foundation. We thank Risat Mahmud Pathan, the members of the Dependable Systems Lab at UBC, and the anonymous reviewers of the DSN 2017 conference for their comments, which have helped us to improve this paper.

Available from: 2021-11-19 Created: 2021-11-19 Last updated: 2023-04-28Bibliographically approved

Open Access in DiVA

No full text in DiVA

Other links

Publisher's full textScopus

Authority records

Sangchoolie, Behrooz

Search in DiVA

By author/editor
Sangchoolie, Behrooz
Natural Sciences

Search outside of DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric score

doi
isbn
urn-nbn
Total: 7 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf