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Light-weight techniques for improving the controllability and efficiency of ISA-level fault injection tools
Chalmers University of Technology, Sweden.ORCID iD: 0000-0001-9536-4269
2017 (English)In: Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC, IEEE Computer Society , 2017, p. 68-77Conference paper, Published paper (Refereed)
Abstract [en]

ISA-level fault injection, i.e. the injection of bitflip faults in Instruction Set Architecture (ISA) registers and main memory words, is widely used for studying the impact of transient and intermittent hardware faults. ISA-level fault injection tools can be characterized by different properties such as repeatability, observability, reachability, intrusiveness, efficiency and controllability. This paper presents two preinjection analysis techniques that improve controllability and efficiency using object code analysis. To improve controllability, we propose a technique for identifying the type of data that is stored in a potential target location. This allows the user to selectively direct fault injections to addresses, data and/or control information. Experimental results show that the data type of 84-100% of the targets locations in 8 programs were successfully identified by this technique. The second technique improves efficiency by fault pruning, i.e., by avoiding injection of faults that is known a priori to be detected by the tested system. This technique leverage the fact that faults in certain bits in the program counter and the stack pointer are always detected by machine exceptions. We show that exclusion of these bits from the fault space could significantly prune the fault space and reduce the time it takes to conduct a fault injection campaign. 

Place, publisher, year, edition, pages
IEEE Computer Society , 2017. p. 68-77
Keywords [en]
Controllability, Data type identification, Efficiency, Fault space optimization, ISA-level fault injection, Software testing, Analysis techniques, Control information, Data type, Fault injection, Fault space, Instruction set architecture, Object code analysis, Potential targets, Computer architecture
National Category
Natural Sciences
Identifiers
URN: urn:nbn:se:ri:diva-56956DOI: 10.1109/PRDC.2017.18Scopus ID: 2-s2.0-85019593637ISBN: 9781509056514 (print)OAI: oai:DiVA.org:ri-56956DiVA, id: diva2:1612786
Conference
22nd IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2017, 22 January 2017 through 25 January 2017
Available from: 2021-11-19 Created: 2021-11-19 Last updated: 2023-04-28Bibliographically approved

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Sangchoolie, Behrooz

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CiteExportLink to record
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Citation style
  • apa
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  • de-DE
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