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Analysis of parasitic elements of SiC power modules with special emphasis on reliability issues
KTH Royal Institute of Technology, Sweden.
KTH Royal Institute of Technology, Sweden.
KTH Royal Institute of Technology, Sweden.
RISE, Swedish ICT, Acreo.ORCID iD: 0000-0002-5027-3491
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2016 (English)In: 2016 IEEE Applied Power Electronics Conference and Exposition (APEC), 2016, p. 1018-1023, article id 7467995Conference paper, Published paper (Refereed)
Abstract [en]

Commercially available Silicon Carbide (SiC) MOSFET power modules often have a design based on existing packages previously used for silicon insulated-gate bipolar transistors. However, these packages are not optimized to take advantage of the SiC benefits, such as, high switching speeds and high-temperature operation. The package of a half-bridge SiC MOSFET module has been modeled and the parasitic elements have been extracted. The model is validated through experiments. An analysis of the impact of these parasitic elements on the gate-source voltage on the chip has been performed for both low switching speeds and high switching speeds. These results reveal potential reliability issues for the gate-oxide if higher switching speeds are targeted.

Place, publisher, year, edition, pages
2016. p. 1018-1023, article id 7467995
Keywords [en]
Silicon Carbide (SiC), MOSFET, Power Modules, Reliability, Multichip Modules
National Category
Computer and Information Sciences
Identifiers
URN: urn:nbn:se:ri:diva-32587DOI: 10.1109/APEC.2016.7467995Scopus ID: 2-s2.0-84973619427ISBN: 9781467383936 (print)OAI: oai:DiVA.org:ri-32587DiVA, id: diva2:1156116
Conference
31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC 2016), March 20-24, 2016, Long Beach, US
Available from: 2017-11-10 Created: 2017-11-10 Last updated: 2023-05-25Bibliographically approved

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Kostov, Konstantin Stoychev

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