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Design gate drive considerations for epitaxial 1.2kV buried grid N-on N-off JFETs for operation at 250C
RISE, Swedish ICT, Acreo.ORCID iD: 0000-0002-9850-9440
RISE, Swedish ICT, Acreo.ORCID iD: 0000-0002-9512-2689
2010 (English)In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 645-648, p. 961-Article in journal (Refereed) Published
Place, publisher, year, edition, pages
2010. Vol. 645-648, p. 961-
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Computer and Information Sciences
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URN: urn:nbn:se:ri:diva-32099OAI: oai:DiVA.org:ri-32099DiVA, id: diva2:1151958
Available from: 2017-10-24 Created: 2017-10-24 Last updated: 2024-04-08Bibliographically approved

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Lim, Jang-KwonBakowski, Mietek

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