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Analysis experimental verification of the influence of fabrication process tolerances circuit parasitic on transient current sharing of parallel-connected SiC JFETs
RISE, Swedish ICT, Acreo.
RISE, Swedish ICT, Acreo.
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2014 (English)In: IEEE transactions on power electronics, ISSN 0885-8993, E-ISSN 1941-0107, Vol. 29, no 5, p. 2180-91Article in journal (Refereed) Published
Place, publisher, year, edition, pages
2014. Vol. 29, no 5, p. 2180-91
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Computer and Information Sciences
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URN: urn:nbn:se:ri:diva-31938OAI: oai:DiVA.org:ri-31938DiVA, id: diva2:1151796
Available from: 2017-10-24 Created: 2017-10-24 Last updated: 2018-01-13Bibliographically approved

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  • apa
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