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Analysis of Parasitic Elements of SiC Power Modules with Special Emphasis on Reliability Issues
KTH Royal Institute of Technology, Sweden.
RISE, Swedish ICT, Acreo.ORCID iD: 0000-0002-5027-3491
KTH Royal Institute of Technology, Sweden.
GE Power, Sweden.
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2016 (English)In: IEEE Journal of Emerging and Selected Topics in Power Electronics, ISSN 2168-6777, E-ISSN 2168-6785, Vol. 4, no 3, p. 988-995, article id 7501457Article in journal (Refereed) Published
Abstract [en]

Commercially available silicon carbide (SiC) MOSFET power modules often have a design based on existing packages previously used for silicon insulated-gate bipolar transistors. However, these packages are not optimized to take advantage of the SiC benefits, such as high switching speeds and high-temperature operation. The package of a half-bridge SiC MOSFET module has been modeled and the parasitic elements have been extracted. The model is validated through experiments. An analysis of the impact of these parasitic elements on the gate-source voltage on the chip has been performed for both low switching speeds and high switching speeds. These results reveal potential reliability issues for the gate oxide if higher switching speeds are targeted.

Place, publisher, year, edition, pages
2016. Vol. 4, no 3, p. 988-995, article id 7501457
Keywords [en]
Multichip modules, packaging, power MOSFETs, reliability, silicon carbide (SiC)
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:ri:diva-25419DOI: 10.1109/JESTPE.2016.2585666Scopus ID: 2-s2.0-84982786778OAI: oai:DiVA.org:ri-25419DiVA, id: diva2:1043934
Available from: 2016-11-01 Created: 2016-10-31 Last updated: 2023-05-25Bibliographically approved

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Kostov, Konstantin Stoychev

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