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Register allocation and instruction scheduling in Unison
RISE, Swedish ICT, SICS, Computer Systems Laboratory.ORCID iD: 0000-0002-2806-7333
RISE, Swedish ICT, SICS, Computer Systems Laboratory.ORCID iD: 0000-0003-3079-8095
RISE, Swedish ICT, SICS, Computer Systems Laboratory.
2016 (English)Conference paper, (Refereed)
Abstract [en]

This paper describes Unison, a simple, flexible, and potentially optimal software tool that performs register allocation and instruction scheduling in integration using combinatorial optimization. The tool can be used as an alternative or as a complement to traditional approaches, which are fast but complex and suboptimal. Unison is most suitable whenever high-quality code is required and longer compilation times can be tolerated (such as in embedded systems or library releases), or the targeted processors are so irregular that traditional compilers fail to generate satisfactory code.

Place, publisher, year, edition, pages
2016, 6.
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:ri:diva-24536OAI: oai:DiVA.org:ri-24536DiVA: diva2:1043620
Conference
25th International Conference on Compiler Construction
Projects
Unison
Available from: 2016-10-31 Created: 2016-10-31 Last updated: 2017-04-25Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
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