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Multiprocessor consistency and synchronization thru transient cache states
RISE, Swedish ICT, SICS, Computer Systems Laboratory.ORCID iD: 0000-0002-6718-0144
1991 (English)Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
1991, 1.
National Category
Computer and Information Sciences
Identifiers
URN: urn:nbn:se:ri:diva-22881OAI: oai:DiVA.org:ri-22881DiVA, id: diva2:1042446
Conference
Proceedings of the Workshop on Scalable Shared-Memory Processors, 26-27 May 1990, Seattle, Washington, USA
Available from: 2016-10-31 Created: 2016-10-31 Last updated: 2018-01-14Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
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Output format
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