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The DDMlite prototype, implementation and early results
Number of Authors: 2
1996 (English)Conference paper, (Refereed)
Abstract [en]

The DDMlite is a COMA shared-memory multiprocessor prototype built at SICS. Starting in June last year, less than two man years has been spent on architecture, hardware design, implementation and debugging to a running system. Using experience from previous projects, focusing on the research-relevant architectural issues while sacrificing some performance, and using state-of-the art tools, we have been able to build a functional multiprocessor prototype with a minimal effort. When fully equipped the DDMlite will have 24 processors and 192 MB COMA attraction memory. The custom node controller board consists of three Xilinx XC4013 and one AMD Mach435 FPGAs, SRAM memory and buffer circuits. The DDMlite is an implementation of the BB-COMA architecture previously presented in [1]. We present the detailed architecture of the DDMlite - in particular the node controller implementation, and explain the complexity/performance trade-offs that enabled us to reach our goals on time. Early results from experiments with the prototype will als be presented.

Place, publisher, year, edition, pages
1996, 1.
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:ri:diva-22836OAI: oai:DiVA.org:ri-22836DiVA: diva2:1042401
Conference
Sixth Workshop on Shared-Memory Multiprocessing
Available from: 2016-10-31 Created: 2016-10-31Bibliographically approved

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Citation style
  • apa
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  • en-US
  • fi-FI
  • nn-NO
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