Vertical GaN devices: Process and reliabilityShow others and affiliations
2021 (English)In: Microelectronics and reliability, ISSN 0026-2714, E-ISSN 1872-941X, Vol. 126, article id 114218Article in journal (Refereed) Published
Abstract [en]
This paper reviews recent progress and key challenges in process and reliability for high-performance vertical GaN transistors and diodes, focusing on the 200 mm CMOS-compatible technology. We particularly demonstrated the potential of using 200 mm diameter CTE matched substrates for vertical power transistors, and gate module optimizations for device robustness. An alternative technology path based on coalescence epitaxy of GaN-on-Silicon is also introduced, which could enable thick drift layers of very low dislocation density. © 2021
Place, publisher, year, edition, pages
Elsevier Ltd , 2021. Vol. 126, article id 114218
Keywords [en]
200 mm CMOS compatible, GaN-on-polyAlN, Power electronics, Vertical GaN device, CMOS integrated circuits, Gallium nitride, CMOS Compatible, CMOS-compatible technology, In-process, Optimisations, Performance, Power-electronics, Recent progress, III-V semiconductors
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:ri:diva-57941DOI: 10.1016/j.microrel.2021.114218Scopus ID: 2-s2.0-85120857060OAI: oai:DiVA.org:ri-57941DiVA, id: diva2:1626650
Note
Funding details: Horizon 2020; Funding details: Electronic Components and Systems for European Leadership, ECSEL, 826392; Funding text 1: This project has received funding from the ECSEL Joint Undertaking (JU) under grant agreement No 826392 . The JU receives support from the European Union's Horizon 2020 research and innovation program and Austria, Belgium, Germany, Italy, Slovakia, Spain, Sweden, Norway, Switzerland.
2022-01-112022-01-112023-06-05Bibliographically approved