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Formal specification and validation of a cache-coherence protocol
RISE - Research Institutes of Sweden, IKT, SICS.
RISE - Research Institutes of Sweden, IKT, SICS.
1995 (engelsk)Rapport (Annet vitenskapelig)
Abstract [en]

We specify a cache coherence protocol for cache-only shared memory multiprocessor architectures using the $\pi$-calculus. The analysis of the specification of the protocol is discussed, with emphasis on the use of the modal $\mu$-calculus to express correctness properties. The protocol specification is expressed using recursion variables inside parallel composition and thus it does not adhere to the syntactic requirements for finite control. We argue that the specification still belongs to a class of $\pi$-calculus processes for which model checking and bisimilarity checking is decidable. The relaxation of the syntactical requirement for finite control permits more natural specifications to be made. We expect that specifications which are naturally expressed using recursion variables inside parallel compositions but still permit decidable analyses are common in practise.

sted, utgiver, år, opplag, sider
Swedish Institute of Computer Science , 1995, 1.
Serie
SICS Research Report, ISSN 0283-3638 ; R95:04
Emneord [en]
Process algebra, p-calculus, µ-calculus, specification, automatic verification, model checking, cache-coherence protocol
HSV kategori
Identifikatorer
URN: urn:nbn:se:ri:diva-22156OAI: oai:DiVA.org:ri-22156DiVA, id: diva2:1041699
Tilgjengelig fra: 2016-10-31 Laget: 2016-10-31 Sist oppdatert: 2018-01-14bibliografisk kontrollert

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