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Publications (10 of 28) Show all publications
Eng, M. P., Mishra, M., Söderkvist Vermelin, W., Andersson, D. & Brinkfeldt, K. (2024). A Link between the Lab and the Real World-A Setup for Accelerated Aging of Power Electronics Using Mission Profiles from the Field. In: 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024: . Paper presented at 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024. Catania, Italy. 7 April 2024 through 10 April 2024. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>A Link between the Lab and the Real World-A Setup for Accelerated Aging of Power Electronics Using Mission Profiles from the Field
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2024 (English)In: 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024, Institute of Electrical and Electronics Engineers Inc. , 2024Conference paper, Published paper (Refereed)
Abstract [en]

To generate data used for developing schemes and models for CM, PHM, and for estimating RUL of power electronic devices, accelerated aging experiments in the form of power cycling are often performed. In these experiments, a set current is passed through the power devices and is turned on and off in regular cycles. Due to the mismatch in CTEs of the materials in the devices, the on/off cycles will generate thermally induced stress in the various material interfaces, which is the main cause of failures. Most of the power cycling setups that are currently used can only manage a single set on-state current level and fixed on/off times (which is also the common standard for lifetime testing); a condition that is very far from most real applications. The experimental setup described here is based on a Gamry Reference 3000AEpotentiostat/galvanostat/ZRA working with a Gamry 30k Booster, which can be programmed to generate a variable load current profile and will thus enable the application of more realistic conditions for accelerated aging of power electronic devices in the lab. This will improve prognostics model development and provide excellent use cases for evaluating the capabilities of the prognostics algorithms for generalization to field conditions. The application of variable load profiles from the field, instead of the regular on/off cycles traditionally used, is not compatible with the commonly used method of using the chip itself as a temperature sensor. Instead, we here present a novel method of estimating the junction temperature using a device specific derivation of thermal parameters from the measured cooling block temperature, case temperature, and dissipated power in conjunction with simulations using the PySpice simulation package implemented in Python. The setup coupled with the new junction temperature estimation is an important step in enabling predictive maintenance of power devices that is currently missing from the power electronics community. © 2024 IEEE.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2024
Keywords
Computer software; Electronic equipment; Power electronics; Python; Thermoelectric equipment; ’current; Accelerated ageing; Junction temperatures; Mission profile; Power cycling; Power devices; Power electronic devices; Power-electronics; Real-world; Variable loads; Junction temperature
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:ri:diva-73256 (URN)10.1109/EuroSimE60745.2024.10491457 (DOI)2-s2.0-85191160586 (Scopus ID)
Conference
25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024. Catania, Italy. 7 April 2024 through 10 April 2024
Note

The project is partly supported by the Chips Joint Undertaking and its members, including the top-up funding by the national Authorities of Germany, Belgium, Spain, Sweden, Netherlands, Austria, Italy, Greece, Latvia, Finland, Hungary, Romania and Switzerland, under grant agreement number 101096387. Co-funded by European Union. and from the Swedish national funding authority Vinnova. The research is also partly supported by VINNOVA (Swedish Innovation Agency) (2020-05117) and BMBF (16ME0324) through the Trust-E project of Eureka PENTA and EURIPIDES2 programmes.

Available from: 2024-05-23 Created: 2024-05-23 Last updated: 2024-08-14Bibliographically approved
Akbari, S., Moabber, K., Kostov, K. S., Bakowski, M., Lim, J.-K. & Brinkfeldt, K. (2024). Parametric Study of Damage Evolution in Silver Sintered Layers of Double Sided Power Electronics Modules of Electric Vehicles. In: PCIM Europe Conference Proceedings: . Paper presented at International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2024 Nuremberg. 11 June 2024 through 13 June 2024 (pp. 2089-2098). Mesago PCIM GmbH, 2024-June
Open this publication in new window or tab >>Parametric Study of Damage Evolution in Silver Sintered Layers of Double Sided Power Electronics Modules of Electric Vehicles
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2024 (English)In: PCIM Europe Conference Proceedings, Mesago PCIM GmbH , 2024, Vol. 2024-June, p. 2089-2098Conference paper, Published paper (Refereed)
Abstract [en]

Double sided modules accommodating wide band gap (WBG) devices are increasingly used in electric vehicles owing to their lower thermal resistance and parasitic inductances. Compared with single sided modules having a single ceramic substrate, the mechanical constraint applied on the silver sintered bonding layers in double sided modules (with two ceramic substrates) poses a more challenging reliability issue. In this work, we develop a parametric model to investigate the effects of layout, geometry and material properties on damage distribution in silver sintered layers of double sided modules. Anand viscoplastic model was used to describe the inelastic deformation of sintered silver under power cycling. Equivalent inelastic strain accumulated in each power cycle was used as the damage parameter and failure criterion. The model enables parametric study of damage distribution in double sided modules, and help improve design for maximum reliability. Using this model, the effects of parameters such as spacer and die thicknesses were investigated in this study.

Place, publisher, year, edition, pages
Mesago PCIM GmbH, 2024
Keywords
Electric locomotives; Fracture mechanics; Silver powder metallurgy; Ceramic substrates; Damage distribution; Damage evolution; Double sided; Mechanical constraints; Parametric study; Parasitic inductances; Power electronics modules; Thermal; Wide band gap devices; Sintering
National Category
Materials Engineering
Identifiers
urn:nbn:se:ri:diva-75033 (URN)10.30420/566262296 (DOI)2-s2.0-85202033086 (Scopus ID)
Conference
International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2024 Nuremberg. 11 June 2024 through 13 June 2024
Available from: 2024-09-05 Created: 2024-09-05 Last updated: 2024-09-05Bibliographically approved
Söderkvist Vermelin, W., Lövberg, A., Misiorny, M., Eng, M. P. & Brinkfeldt, K. (2023). Data-Driven Remaining Useful Life Estimation of Discrete Power Electronic Devices. In: Mário P. Brito, Terje Aven, Piero Baraldi, Marko Čepin, Enrico Zio (Ed.), 33rd European Safety and Reliability Conference: The Future of Safety in a Reconnected World. Paper presented at 33rd European Safety and Reliability Conference, Southampton, September 3-8, 2023 (pp. 2595).
Open this publication in new window or tab >>Data-Driven Remaining Useful Life Estimation of Discrete Power Electronic Devices
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2023 (English)In: 33rd European Safety and Reliability Conference: The Future of Safety in a Reconnected World / [ed] Mário P. Brito, Terje Aven, Piero Baraldi, Marko Čepin, Enrico Zio, 2023, p. 2595-Conference paper, Published paper (Refereed)
Abstract [en]

Robust and accurate prognostics models for estimation of remaining useful life (RUL) are becoming an increasingly important aspect of research in reliability and safety in modern electronic components and systems. In this work, a data driven approach to the prognostics problem is presented. In particular, machine learning models are trained to predict the RUL of wire-bonded silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) subjected to power cycling until failure. During such power cycling, ON-state voltage and various temperature measurements are continuously collected. As the data set contains full run-to-failure trajectories, the issue of estimating RUL is naturally formulated in terms of supervised learning. Three neural network architectures were trained, evaluated, and compared on the RUL problem: a temporal convolutional neural network (TCN), a long short-term memory neural network (LSTM) and a convolutional gated recurrent neural network (Conv-GRU). While the results show that all networks perform well on held out testing data if the testing samples are of similar aging acceleration as the samples in the training data set, performance on out-of-distribution data is significantly lower. To this end, we discuss potential research directions to improve model performance in such scenarios.

Keywords
Electronics, Prognostics and health management, Remaining useful life, Data-driven, Machine learning, Deep learning, Power cycling
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:ri:diva-67109 (URN)978-981-18-8071-1 (ISBN)
Conference
33rd European Safety and Reliability Conference, Southampton, September 3-8, 2023
Projects
iRel4.0
Funder
Vinnova
Note

ch is conducted within the iRel4.0 Intelligent Reliability project, which is funded by Horizon2020 Electronics Components for European LeadershipJoint Undertaking Innovation Action (H2020-ECSELJU-IA). This work is also funded by the Swedish innovation agency Vinnova, through co-funding of H2020-ECSEL-JU-IA.

Available from: 2023-09-13 Created: 2023-09-13 Last updated: 2024-04-16Bibliographically approved
Akbari, S., Holmberg, J., Andersson, D., Mishra, M. & Brinkfeldt, K. (2023). Packaging Induced Stresses in Embedded and Molded GaN Power Electronics Components. In: Int. Conf. Therm., Mech. Multi-Phys. Simul. Exp. Microelectron. Microsyst., EuroSimE: . Paper presented at 2023 24th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2023. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Packaging Induced Stresses in Embedded and Molded GaN Power Electronics Components
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2023 (English)In: Int. Conf. Therm., Mech. Multi-Phys. Simul. Exp. Microelectron. Microsyst., EuroSimE, Institute of Electrical and Electronics Engineers Inc. , 2023Conference paper, Published paper (Refereed)
Abstract [en]

Residual stresses created during the packaging process can adversely affect the reliability of electronics components. We used incremental hole-drilling method, following the ASTM E 837-20 standard, to measure packaging induced residual stresses in discrete packages of power electronics components. For this purpose, we bonded a strain gauge on the surface of a Gallium Nitride (GaN) power component, drilled a hole through the thickness of the component in several incremental steps, recorded the relaxed strain data on the sample surface using the strain gauge, and finally calculated the residual stresses from the measured strain data. The recorded strains and the residual stresses are related by the compliance coefficients. For the hole drilling method in the isotropic materials, the compliance coefficients are calculated from the analytical solutions, and available in the ASTM standard. But for the orthotropic multilayered components typically found in microelectronics assemblies, numerical solutions are necessary. We developed a subroutine in ANSYS APDL to calculate the compliance coefficients of the hole drilling test in the molded and embedded power electronics components. This can extend the capability of the hole drilling method to determine residual stresses in more complex layered structures found in electronics. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2023
Keywords
ASTM standards, Elasticity, Gallium nitride, III-V semiconductors, Microelectronics, Strain, Strain gages, Structural design, Discrete package, Electronic component, Incremental hole drilling method, Packaging induced stress, Packaging process, Power components, Power electronic components, Strain data, Strain-gages, Residual stresses
National Category
Applied Mechanics
Identifiers
urn:nbn:se:ri:diva-65629 (URN)10.1109/EuroSimE56861.2023.10100830 (DOI)2-s2.0-85158147217 (Scopus ID)
Conference
2023 24th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2023
Note

 Correspondence Address: S. Akbari; Rise Research Institutes of Sweden, Sweden; This project has received funding from European Union s Horizon 2020 research and innovation programme (UltimateGaN project, grant agreement No 826392). It was also supported by Future Power Electronics Project funded by the ICT- Sweden.

Available from: 2023-06-30 Created: 2023-06-30 Last updated: 2024-05-21Bibliographically approved
Eng, M. P., Lövberg, A., Misiorny, M., Söderkvist Vermelin, W., Brinkfeldt, K. & Mishra, M. (2023). Simple Hybrid Model for Estimating Remaining Useful Life of SiC MOSFETs in Power Cycling Experiments. In: : . Paper presented at 4th Asia Pacific Conference of the Prognostics and Health Management, Tokyo, Japan, September 11 – 14, 2023. , 4(1), Article ID OS09-03.
Open this publication in new window or tab >>Simple Hybrid Model for Estimating Remaining Useful Life of SiC MOSFETs in Power Cycling Experiments
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2023 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Recording and prediction of the accumulated damage, which will eventually lead to the failure of power electronic modules, is an aspect of high importance for power electronic systems design and, in particular, for development of Prognostic and Health Management (PHM) schemes for in-field applications. To this end, this paper presents a simple and cost-effective prognostic method for predicting the remaining useful life (RUL) of TO-247 packaged silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs) subjected to power cycling experiments. The model assumes that the major failure mode is bond-wire lift-off and uses a damage accumulation scheme based on Paris’ crack law. The only inputs to the model are historical data on the average junction temperature swing and the temperaturecompensated drain-source ON-state resistance at the peak temperature of the current cycle. Using only these two input values, the model is shown to predict RUL with surprising accuracy for the range of constant current loads determining cycling conditions under which the test data series have been acquired. This work is a first step in an ongoing project towards building more elaborate prognostic schemes for RUL-determination of SiC power MOSFETs in actual working conditions, using physics-informed neural networks (PINNs).

National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:ri:diva-71044 (URN)10.36001/phmap.2023.v4i1.3744 (DOI)
Conference
4th Asia Pacific Conference of the Prognostics and Health Management, Tokyo, Japan, September 11 – 14, 2023
Note

This research is conducted within the iRel4.0 Intelligent Reliability project, which is funded by Horizon 2020 Electronics Components for European Leadership Joint Undertaking Innovation Action (H2020-ECSELJU-IA). This work is also funded by the Swedish innovation agency Vinnova, through co-funding of H2020-ECSEL-JU-IA.

Available from: 2024-01-25 Created: 2024-01-25 Last updated: 2024-05-21Bibliographically approved
Akbari, S., Kostov, K. S., Brinkfeldt, K., Adolfsson, E., Lim, J.-K., Andersson, D., . . . Salter, M. (2022). Ceramic Additive Manufacturing Potential for Power Electronics Packaging. IEEE Transactions on Components, Packaging, and Manufacturing Technology, 12(11), 1857-1866
Open this publication in new window or tab >>Ceramic Additive Manufacturing Potential for Power Electronics Packaging
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2022 (English)In: IEEE Transactions on Components, Packaging, and Manufacturing Technology, ISSN 2156-3950, E-ISSN 2156-3985, Vol. 12, no 11, p. 1857-1866Article in journal (Refereed) Published
Abstract [en]

Compared with silicon-based power devices, wide band gap (WBG) semiconductor devices operate at significantly higher power densities required in applications such as electric vehicles and more electric airplanes. This necessitates development of power electronics packages with enhanced thermal characteristics that fulfil the electrical insulation requirements. The present research investigates the feasibility of using ceramic additive manufacturing (AM), also known as three-dimensional (3D) printing, to address thermal and electrical requirements in packaging gallium nitride (GaN) based high-electron-mobility transistors (HEMTs). The goal is to exploit design freedom and manufacturing flexibility provided by ceramic AM to fabricate power device packages with a lower junction-to-ambient thermal resistance (<italic>R</italic>&#x03B8;JA). Ceramic AM also enables incorporation of intricate 3D features into the package structure in order to control the isolation distance between the package source and drain contact pads. Moreover, AM allows to fabricate different parts of the packaging assembly as a single structure to avoid high thermal resistance interfaces. For example, the ceramic package and the ceramic heatsink can be printed as a single part without any bonding layer. Thermal simulations under different thermal loading and cooling conditions show the improvement of thermal performance of the package fabricated by ceramic AM. If assisted by an efficient cooling strategy, the proposed package has the potential to reduce <italic>R</italic>&#x03B8;JA by up to 48%. The results of the preliminary efforts to fabricate the ceramic package by AM are presented, and the challenges that have to be overcome for further development of this manufacturing method are recognized and discussed. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2022
Keywords
Ceramic additive manufacturing, GaN HEMTs, isolation distance, power electronics packaging, thermal resistance, wide band gap semiconductors, 3D printers, Ceramic materials, Chip scale packages, Energy gap, Fabrication, Gallium nitride, High electron mobility transistors, III-V semiconductors, Industrial research, Thermal insulation, Ceramic additives, Ceramic package, Gallium nitride high-electron-mobility transistor, High electron-mobility transistors, Power devices, Silicon-based, Wide-band-gap semiconductor
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:ri:diva-62617 (URN)10.1109/TCPMT.2022.3224921 (DOI)2-s2.0-85144078339 (Scopus ID)
Note

This work supported by the Electronic Components and Systems for European Leadership (ECSEL) Joint Undertaking (JU) through the UltimateGaN Project and the European Union’s Horizon 2020 Research and Innovation Programunder Grant 826392.

Available from: 2023-01-20 Created: 2023-01-20 Last updated: 2024-09-04Bibliographically approved
Akbari, S., Kostov, K. S., Brinkfeldt, K., Bakowski, M. & Andersson, D. (2022). Low Inductive SiC Power Electronics Module with Flexible PCB Interconnections and 3D Printed Casing. In: 2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022: . Paper presented at 2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022, 12 June 2022 through 14 June 2022. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Low Inductive SiC Power Electronics Module with Flexible PCB Interconnections and 3D Printed Casing
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2022 (English)In: 2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022, Institute of Electrical and Electronics Engineers Inc. , 2022Conference paper, Published paper (Refereed)
Abstract [en]

Silicon carbide (SiC) power devices are steadily increasing their market share in various power electronics applications. However, they require low-inductive packaging in order to realize their full potential. In this research, low-inductive layouts for half-bridge power modules, using a direct bonded copper (DBC) substrate, that are suitable for SiC power devices, were designed and tested. To reduce the negative effects of the switching transients on the gate voltage, flexible printed circuit boards (PCBs) were used to interconnect the gate and source pins of the module with the corresponding pads of the power chips. In addition, conductive springs were used as low inductive, solder-free contacts for the module power terminals. The module casing and lid were produced using additive manufacturing, also known as 3D printing, to create a compact design. It is shown that the inductance of this module is significantly lower than the commercially available modules.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2022
Keywords
low inductive module, parasitic inductance, Power electronics packaging, SiC devices, Competition, Electric power system interconnection, Flexible electronics, Inductance, Integrated circuit interconnects, Microelectronics, Printed circuit boards, Silicon carbide, Flexible printed-circuit board, Market share, Parasitic inductances, Power electronics modules, Printed circuit board interconnections, Silicon carbide devices, Silicon carbide power, Silicon-carbide power devices, 3D printers
National Category
Physical Sciences
Identifiers
urn:nbn:se:ri:diva-60266 (URN)2-s2.0-85138492048 (Scopus ID)9789189711396 (ISBN)
Conference
2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022, 12 June 2022 through 14 June 2022
Note

Funding details: 44163; Funding text 1: This work was performed under the project Low-Inductive SiC Module (LISM) that received funding from the Swedish energy agency Energimyndigheten with the grant agreement No 44163.

Available from: 2022-10-10 Created: 2022-10-10 Last updated: 2024-02-06Bibliographically approved
Dejke, V., Eng, M., Brinkfeldt, K., Charnley, J., Lussey, D. & Lussey, C. (2021). Development of prototype low-cost qtss™ wearable flexible more enviro-friendly pressure, shear, and friction sensors for dynamic prosthetic fit monitoring. Sensors, 21(11), Article ID 3764.
Open this publication in new window or tab >>Development of prototype low-cost qtss™ wearable flexible more enviro-friendly pressure, shear, and friction sensors for dynamic prosthetic fit monitoring
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2021 (English)In: Sensors, E-ISSN 1424-8220, Vol. 21, no 11, article id 3764Article in journal (Refereed) Published
Abstract [en]

There is a current healthcare need for improved prosthetic socket fit provision for the masses using low-cost and simple to manufacture sensors that can measure pressure, shear, and friction. There is also a need to address society’s increasing concerns regarding the environmental impact of electronics and IoT devices. Prototype thin, low-cost, and low-weight pressure, shear, and loss of friction sensors have been developed and assembled for trans-femoral amputees. These flexible and conformable sensors are simple to manufacture and utilize more enviro-friendly novel magnetite-based QTSS™ (Quantum Technology Supersensor™) quantum materials. They have undergone some initial tests on flat and curved surfaces in a pilot amputee trial, which are presented in this paper. These initial findings indicate that the prototype pressure sensor strip is capable of measuring pressure both on flat and curved socket surfaces in a pilot amputee trial. They have also demonstrated that the prototype shear sensor can indicate increasing shear forces, the resultant direction of the shear forces, and loss of friction/slippage events. Further testing, amputee trials, and ongoing optimization is continuing as part of the SocketSense project to assist prosthetic comfort and fit. © 2021 by the authors

Place, publisher, year, edition, pages
MDPI AG, 2021
Keywords
Composite materials, Flexible sensor, Loss of friction sensor, Pressure sensor, QTSS™, Quantum materials, Quantum Technology Supersensors™, Quantum tunnelling conduction, Shear sensor, Wearable sensor, Artificial limbs, Costs, Environmental impact, Friction, Magnetite, Manufacture, Shear flow, Curved surfaces, Low costs, Prosthetic fits, Prosthetic sockets, Quantum technologies, Shear force, Wearable sensors
National Category
Control Engineering
Identifiers
urn:nbn:se:ri:diva-54358 (URN)10.3390/s21113764 (DOI)2-s2.0-85106744334 (Scopus ID)
Note

 Funding details: Horizon 2020 Framework Programme, H2020, 825429; Funding text 1: Funding: This work is part of th SocketSense Project that has received funding from the European Union’s Horizon 2020 Research and Innovation Programme under the grant agreement No 825429.

Available from: 2021-06-18 Created: 2021-06-18 Last updated: 2024-08-12Bibliographically approved
Pressel, K., Moser, J., Rzepka, S., Brinkfeldt, K., Zhao, S., van Driel, W., . . . Pomante, L. (2021). The H2020-ECSEL Project “iRel40” (Intelligent Reliability 4.0). In: 2021 24th Euromicro Conference on Digital System Design (DSD): . Paper presented at 2021 24th Euromicro Conference on Digital System Design (DSD).1-3 Sept. 2021 (pp. 311-318).
Open this publication in new window or tab >>The H2020-ECSEL Project “iRel40” (Intelligent Reliability 4.0)
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2021 (English)In: 2021 24th Euromicro Conference on Digital System Design (DSD), 2021, p. 311-318Conference paper, Published paper (Refereed)
Abstract [en]

Building on many discoveries and inventions, electronics started affecting people’s everyday lives in a significant fashion following the invention of the first solid state transistor in late 1940s. The miniaturization paved way for the mass electronics production and later the digital revolution, the outcomes of which are visible to all members of the public today. After about a two-decade-long swing around 2000s from hardware towards software regarding what affects lives more, a point has now been reached where electronics is more important to all and its use is more ubiquitous and crucial than ever before. In most if not all of end user or industrial applications, the capability and quality of electronics hardware are the key determining factors.The European electronics components and systems (ECS) industry has traditionally had a high base line for electronics innovation. However, the industry is now compelled, partly due to competition and partly due customer demand, to manufacture even more reliable electronics products than before. Guaranteeing the reliability of electronics hardware entails the entire ECS value chain to undergo a paradigm shift to holistically address reliability as a key issue. The European ECS industry previously adopted overseas outsourcing considerably, however it is now taking steps to reshape itself into a more coherent value chain with the aim of having not only the electronics designs but also the electronics manufacturing made in Europe.H2020-ECSEL programme successfully funds highly competitive projects in the area of electronics components and systems. We present here a prologue to a similarly funded project entitled Intelligent Reliability 4.0 ("iRel40"), by providing a background to the topic of ECS, project objectives, and the methodologies and implementations we plan to undertake during the 36-month period of this ongoing project.

Keywords
Technological innovation, Shape, Conferences, Europe, Electronic components, Hardware, Software
National Category
Computer Systems
Identifiers
urn:nbn:se:ri:diva-57482 (URN)10.1109/DSD53832.2021.00054 (DOI)
Conference
2021 24th Euromicro Conference on Digital System Design (DSD).1-3 Sept. 2021
Available from: 2021-12-28 Created: 2021-12-28 Last updated: 2023-05-25Bibliographically approved
Akbari, S., Lövberg, A., Tegehall, P.-E., Brinkfeldt, K. & Andersson, D. (2019). Effect of PCB cracks on thermal cycling reliability of passive microelectronic components with single-grained solder joints. Microelectronics and reliability, 93, 61-71
Open this publication in new window or tab >>Effect of PCB cracks on thermal cycling reliability of passive microelectronic components with single-grained solder joints
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2019 (English)In: Microelectronics and reliability, ISSN 0026-2714, E-ISSN 1872-941X, Vol. 93, p. 61-71Article in journal (Refereed) Published
Abstract [en]

Lead-free tin-based solder joints often have a single-grained structure with random orientation and highly anisotropic properties. These alloys are typically stiffer than lead-based solders, hence transfer more stress to printed circuit boards (PCBs) during thermal cycling. This may lead to cracking of the PCB laminate close to the solder joints, which could increase the PCB flexibility, alleviate strain on the solder joints, and thereby enhance the solder fatigue life. If this happens during accelerated thermal cycling it may result in overestimating the lifetime of solder joints in field conditions. In this study, the grain structure of SAC305 solder joints connecting ceramic resistors to PCBs was studied using polarized light microscopy and was found to be mostly single-grained. After thermal cycling, cracks were observed in the PCB under the solder joints. These cracks were likely formed at the early stages of thermal cycling prior to damage initiation in the solder. A finite element model incorporating temperature-dependant anisotropic thermal and mechanical properties of single-grained solder joints is developed to study these observations in detail. The model is able to predict the location of damage initiation in the PCB and the solder joints of ceramic resistors with reasonable accuracy. It also shows that the PCB cracks of even very small lengths may significantly reduce accumulated creep strain and creep work in the solder joints. The proposed model is also able to evaluate the influence of solder anisotropy on damage evolution in the neighbouring (opposite) solder joints of a ceramic resistor.

Keywords
Anisotropy of tin grains, Finite element modelling, Lead-free soldering, Passive components, PCB cracking, Anisotropy, Ceramic materials, Cracks, Creep, Electronics packaging, Finite element method, Mechanical properties, Microelectronics, Printed circuit boards, Resistors, Soldering, Thermal cycling, Accelerated thermal cycling, Microelectronic components, Printed circuit board (PCBs), Thermal and mechanical properties, Thermal cycling reliability, Lead-free solders
National Category
Natural Sciences
Identifiers
urn:nbn:se:ri:diva-37331 (URN)10.1016/j.microrel.2019.01.006 (DOI)2-s2.0-85059773183 (Scopus ID)
Note

Funding details: VINNOVA, 2015-01420; Funding details: Swedish Insitute, SI; Funding text 1: This work has been conducted within the Swedish national project "Requirements, specification and verification of environmental protection and life of solder joints to components" supported by the Swedish Governmental Agency for Innovation Systems (Vinnova) under contract 2015-01420 .

Available from: 2019-01-22 Created: 2019-01-22 Last updated: 2023-05-25Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-6483-8924

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