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Publications (10 of 40) Show all publications
Eng, M. P., Mishra, M., Söderkvist Vermelin, W., Andersson, D. & Brinkfeldt, K. (2024). A Link between the Lab and the Real World-A Setup for Accelerated Aging of Power Electronics Using Mission Profiles from the Field. In: 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024: . Paper presented at 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024. Catania, Italy. 7 April 2024 through 10 April 2024. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>A Link between the Lab and the Real World-A Setup for Accelerated Aging of Power Electronics Using Mission Profiles from the Field
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2024 (English)In: 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024, Institute of Electrical and Electronics Engineers Inc. , 2024Conference paper, Published paper (Refereed)
Abstract [en]

To generate data used for developing schemes and models for CM, PHM, and for estimating RUL of power electronic devices, accelerated aging experiments in the form of power cycling are often performed. In these experiments, a set current is passed through the power devices and is turned on and off in regular cycles. Due to the mismatch in CTEs of the materials in the devices, the on/off cycles will generate thermally induced stress in the various material interfaces, which is the main cause of failures. Most of the power cycling setups that are currently used can only manage a single set on-state current level and fixed on/off times (which is also the common standard for lifetime testing); a condition that is very far from most real applications. The experimental setup described here is based on a Gamry Reference 3000AEpotentiostat/galvanostat/ZRA working with a Gamry 30k Booster, which can be programmed to generate a variable load current profile and will thus enable the application of more realistic conditions for accelerated aging of power electronic devices in the lab. This will improve prognostics model development and provide excellent use cases for evaluating the capabilities of the prognostics algorithms for generalization to field conditions. The application of variable load profiles from the field, instead of the regular on/off cycles traditionally used, is not compatible with the commonly used method of using the chip itself as a temperature sensor. Instead, we here present a novel method of estimating the junction temperature using a device specific derivation of thermal parameters from the measured cooling block temperature, case temperature, and dissipated power in conjunction with simulations using the PySpice simulation package implemented in Python. The setup coupled with the new junction temperature estimation is an important step in enabling predictive maintenance of power devices that is currently missing from the power electronics community. © 2024 IEEE.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2024
Keywords
Computer software; Electronic equipment; Power electronics; Python; Thermoelectric equipment; ’current; Accelerated ageing; Junction temperatures; Mission profile; Power cycling; Power devices; Power electronic devices; Power-electronics; Real-world; Variable loads; Junction temperature
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:ri:diva-73256 (URN)10.1109/EuroSimE60745.2024.10491457 (DOI)2-s2.0-85191160586 (Scopus ID)
Conference
25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2024. Catania, Italy. 7 April 2024 through 10 April 2024
Note

The project is partly supported by the Chips Joint Undertaking and its members, including the top-up funding by the national Authorities of Germany, Belgium, Spain, Sweden, Netherlands, Austria, Italy, Greece, Latvia, Finland, Hungary, Romania and Switzerland, under grant agreement number 101096387. Co-funded by European Union. and from the Swedish national funding authority Vinnova. The research is also partly supported by VINNOVA (Swedish Innovation Agency) (2020-05117) and BMBF (16ME0324) through the Trust-E project of Eureka PENTA and EURIPIDES2 programmes.

Available from: 2024-05-23 Created: 2024-05-23 Last updated: 2024-08-14Bibliographically approved
Söderkvist Vermelin, W., Mishra, M., Eng, M. P., Andersson, D. & Kyprianidis, K. (2024). Collaborative Training of Data-Driven Remaining Useful Life Prediction Models Using Federated Learning. International Journal of Prognostics and Health Management, 15(2)
Open this publication in new window or tab >>Collaborative Training of Data-Driven Remaining Useful Life Prediction Models Using Federated Learning
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2024 (English)In: International Journal of Prognostics and Health Management, E-ISSN 2153-2648, Vol. 15, no 2Article in journal (Refereed) Epub ahead of print
Abstract [en]

Remaining useful life prediction models are a central aspect of developing modern and capable prognostics and health management systems. Recently, such models are increasingly data-driven and based on various machine learning techniques, in particular deep neural networks. Such models are notoriously “data hungry”, i.e., to get adequate performance of such models, a substantial amount of diverse training data is needed. However, in several domains in which one would like to deploy data-driven remaining useful life models, there is a lack of data or data are distributed among several actors. Often these actors, for various reasons, cannot share data among themselves. In this paper a method for collaborative training of remaining useful life models based on federated learning is presented. In this setting, actors do not need to share locally held secret data, only model updates. Model updates are aggregated by a central server, and subsequently sent back to each of the clients, until convergence. There are numerous strategies for aggregating clients’ model updates and in this paper two strategies will be explored: 1) federated averaging and 2) federated learning with personalization layers. Federated averaging is the common baseline federated learning strategy where the clients’ models are averaged by the central server to update the global model. Federated averaging has been shown to have a limited ability to deal with non-identically and independently distributed data. To mitigate this problem, federated learning with personalization layers, a strategy similar to federated averaging but where each client is allowed to append custom layers to their local model, is explored. The two federated learning strategies will be evaluated on two datasets: 1) run-to-failure trajectories from power cycling of silicon-carbide metal-oxide semiconductor field-effect transistors, and 2) C-MAPSS, a well-known simulated dataset of turbofan jet engines. Two neural network model architectures commonly used in remaining useful life prediction, long short-term memory with multi-layer perceptron feature extractors, and convolutional gated recurrent unit, will be used for the evaluation. It is shown that similar or better performance is achieved when using federated learning compared to when the model is only trained on local data.

Keywords
remaining useful life, federated learning, machine learning, prognostics and health management, deep learning, electronics, turbofan jet engines
National Category
Reliability and Maintenance
Identifiers
urn:nbn:se:ri:diva-75674 (URN)10.36001/ijphm.2024.v15i2.3821 (DOI)
Available from: 2024-10-07 Created: 2024-10-07 Last updated: 2024-10-07Bibliographically approved
Akbari, S., Holmberg, J., Andersson, D., Mishra, M. & Brinkfeldt, K. (2023). Packaging Induced Stresses in Embedded and Molded GaN Power Electronics Components. In: Int. Conf. Therm., Mech. Multi-Phys. Simul. Exp. Microelectron. Microsyst., EuroSimE: . Paper presented at 2023 24th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2023. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Packaging Induced Stresses in Embedded and Molded GaN Power Electronics Components
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2023 (English)In: Int. Conf. Therm., Mech. Multi-Phys. Simul. Exp. Microelectron. Microsyst., EuroSimE, Institute of Electrical and Electronics Engineers Inc. , 2023Conference paper, Published paper (Refereed)
Abstract [en]

Residual stresses created during the packaging process can adversely affect the reliability of electronics components. We used incremental hole-drilling method, following the ASTM E 837-20 standard, to measure packaging induced residual stresses in discrete packages of power electronics components. For this purpose, we bonded a strain gauge on the surface of a Gallium Nitride (GaN) power component, drilled a hole through the thickness of the component in several incremental steps, recorded the relaxed strain data on the sample surface using the strain gauge, and finally calculated the residual stresses from the measured strain data. The recorded strains and the residual stresses are related by the compliance coefficients. For the hole drilling method in the isotropic materials, the compliance coefficients are calculated from the analytical solutions, and available in the ASTM standard. But for the orthotropic multilayered components typically found in microelectronics assemblies, numerical solutions are necessary. We developed a subroutine in ANSYS APDL to calculate the compliance coefficients of the hole drilling test in the molded and embedded power electronics components. This can extend the capability of the hole drilling method to determine residual stresses in more complex layered structures found in electronics. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2023
Keywords
ASTM standards, Elasticity, Gallium nitride, III-V semiconductors, Microelectronics, Strain, Strain gages, Structural design, Discrete package, Electronic component, Incremental hole drilling method, Packaging induced stress, Packaging process, Power components, Power electronic components, Strain data, Strain-gages, Residual stresses
National Category
Applied Mechanics
Identifiers
urn:nbn:se:ri:diva-65629 (URN)10.1109/EuroSimE56861.2023.10100830 (DOI)2-s2.0-85158147217 (Scopus ID)
Conference
2023 24th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2023
Note

 Correspondence Address: S. Akbari; Rise Research Institutes of Sweden, Sweden; This project has received funding from European Union s Horizon 2020 research and innovation programme (UltimateGaN project, grant agreement No 826392). It was also supported by Future Power Electronics Project funded by the ICT- Sweden.

Available from: 2023-06-30 Created: 2023-06-30 Last updated: 2024-05-21Bibliographically approved
Akbari, S., Kostov, K. S., Brinkfeldt, K., Adolfsson, E., Lim, J.-K., Andersson, D., . . . Salter, M. (2022). Ceramic Additive Manufacturing Potential for Power Electronics Packaging. IEEE Transactions on Components, Packaging, and Manufacturing Technology, 12(11), 1857-1866
Open this publication in new window or tab >>Ceramic Additive Manufacturing Potential for Power Electronics Packaging
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2022 (English)In: IEEE Transactions on Components, Packaging, and Manufacturing Technology, ISSN 2156-3950, E-ISSN 2156-3985, Vol. 12, no 11, p. 1857-1866Article in journal (Refereed) Published
Abstract [en]

Compared with silicon-based power devices, wide band gap (WBG) semiconductor devices operate at significantly higher power densities required in applications such as electric vehicles and more electric airplanes. This necessitates development of power electronics packages with enhanced thermal characteristics that fulfil the electrical insulation requirements. The present research investigates the feasibility of using ceramic additive manufacturing (AM), also known as three-dimensional (3D) printing, to address thermal and electrical requirements in packaging gallium nitride (GaN) based high-electron-mobility transistors (HEMTs). The goal is to exploit design freedom and manufacturing flexibility provided by ceramic AM to fabricate power device packages with a lower junction-to-ambient thermal resistance (<italic>R</italic>&#x03B8;JA). Ceramic AM also enables incorporation of intricate 3D features into the package structure in order to control the isolation distance between the package source and drain contact pads. Moreover, AM allows to fabricate different parts of the packaging assembly as a single structure to avoid high thermal resistance interfaces. For example, the ceramic package and the ceramic heatsink can be printed as a single part without any bonding layer. Thermal simulations under different thermal loading and cooling conditions show the improvement of thermal performance of the package fabricated by ceramic AM. If assisted by an efficient cooling strategy, the proposed package has the potential to reduce <italic>R</italic>&#x03B8;JA by up to 48%. The results of the preliminary efforts to fabricate the ceramic package by AM are presented, and the challenges that have to be overcome for further development of this manufacturing method are recognized and discussed. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2022
Keywords
Ceramic additive manufacturing, GaN HEMTs, isolation distance, power electronics packaging, thermal resistance, wide band gap semiconductors, 3D printers, Ceramic materials, Chip scale packages, Energy gap, Fabrication, Gallium nitride, High electron mobility transistors, III-V semiconductors, Industrial research, Thermal insulation, Ceramic additives, Ceramic package, Gallium nitride high-electron-mobility transistor, High electron-mobility transistors, Power devices, Silicon-based, Wide-band-gap semiconductor
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:ri:diva-62617 (URN)10.1109/TCPMT.2022.3224921 (DOI)2-s2.0-85144078339 (Scopus ID)
Note

This work supported by the Electronic Components and Systems for European Leadership (ECSEL) Joint Undertaking (JU) through the UltimateGaN Project and the European Union’s Horizon 2020 Research and Innovation Programunder Grant 826392.

Available from: 2023-01-20 Created: 2023-01-20 Last updated: 2024-09-04Bibliographically approved
Akbari, S., Kostov, K. S., Brinkfeldt, K., Bakowski, M. & Andersson, D. (2022). Low Inductive SiC Power Electronics Module with Flexible PCB Interconnections and 3D Printed Casing. In: 2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022: . Paper presented at 2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022, 12 June 2022 through 14 June 2022. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Low Inductive SiC Power Electronics Module with Flexible PCB Interconnections and 3D Printed Casing
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2022 (English)In: 2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022, Institute of Electrical and Electronics Engineers Inc. , 2022Conference paper, Published paper (Refereed)
Abstract [en]

Silicon carbide (SiC) power devices are steadily increasing their market share in various power electronics applications. However, they require low-inductive packaging in order to realize their full potential. In this research, low-inductive layouts for half-bridge power modules, using a direct bonded copper (DBC) substrate, that are suitable for SiC power devices, were designed and tested. To reduce the negative effects of the switching transients on the gate voltage, flexible printed circuit boards (PCBs) were used to interconnect the gate and source pins of the module with the corresponding pads of the power chips. In addition, conductive springs were used as low inductive, solder-free contacts for the module power terminals. The module casing and lid were produced using additive manufacturing, also known as 3D printing, to create a compact design. It is shown that the inductance of this module is significantly lower than the commercially available modules.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2022
Keywords
low inductive module, parasitic inductance, Power electronics packaging, SiC devices, Competition, Electric power system interconnection, Flexible electronics, Inductance, Integrated circuit interconnects, Microelectronics, Printed circuit boards, Silicon carbide, Flexible printed-circuit board, Market share, Parasitic inductances, Power electronics modules, Printed circuit board interconnections, Silicon carbide devices, Silicon carbide power, Silicon-carbide power devices, 3D printers
National Category
Physical Sciences
Identifiers
urn:nbn:se:ri:diva-60266 (URN)2-s2.0-85138492048 (Scopus ID)9789189711396 (ISBN)
Conference
2022 IMAPS Nordic Conference on Microelectronics Packaging, NordPac 2022, 12 June 2022 through 14 June 2022
Note

Funding details: 44163; Funding text 1: This work was performed under the project Low-Inductive SiC Module (LISM) that received funding from the Swedish energy agency Energimyndigheten with the grant agreement No 44163.

Available from: 2022-10-10 Created: 2022-10-10 Last updated: 2024-02-06Bibliographically approved
Sjöberg, P.-O., Edström, A., Andersson, A., Salter, M., Samel, B. & Andersson, D. (2022). Sverige i halvledarvärlden – analys och förslag till strategi.
Open this publication in new window or tab >>Sverige i halvledarvärlden – analys och förslag till strategi
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2022 (Swedish)Report (Other academic)
Abstract [sv]

Den brist på halvledare som industrin upplevt under 2021 har satt den annars tämligen anonyma halvledarindustrin i rampljuset såväl i Sverige som i Europa, USA och globalt. Hur länge denna brist kommer att bestå är en viktig fråga för industrin, som dock är svår att svara på. Enligt internationella analytiker kommer industrin att uppleva halvledarbrist fram till sommaren 2022 och eventuellt in på nästa höst eller eventuellt längre, varefter det föreligger en risk för överproduktion då lager förmodligen byggts upp bland avnämare. Erfarenheterna från tidigare halvledarbrister är att de så småningom övergår i överskott. Men den nuvarande bristen kan sannolikt kräva längre tid för detta än tidigare brister. Främsta skälet är att de halvledarfabriker som för närvarande är under uppbyggnad för att råda bot på bristen lider av samma överhettade försörjningskedjor som övrig industri, med förseningar av allt från vitala utrustningar till förbrukningsmateriel, och att det därför troligen kommer att ta längre tid än planerat att få dem i drift. Detta kan i värsta fall innebära att det rentav kan ta ett eller flera år längre tid än analytikerna förutspått innan försörjningsläget är normalt. Sverige är en del av det globala halvledarekosystemet – ett komplext ekosystem som kännetecknas av hög grad av arbetsfördelning, hög kapitalintensitet, hög kunskapsintensitet, långa produktionstider, stark internationalisering och starka inlåsningseffekter. Sverige interagerar med detta globala ekosystem på två sätt - som leverantör av produkter och tjänster i ett antal nischer där vi uppvisar global spetskompetens samt som avnämare av halvledarprodukter för industriella behov. Båda dessa sidor behöver stärkas för att a) våra SMF och stora företag ska kunna få tillgång till de halvledare och system byggda på halvledare som krävs för den produktion av produkter och tjänster som bidrar till Sveriges välstånd, b) svenska industriföretag ska kunna säkra tillgång till den kompetens och de tjänster som krävs då industrins produkter innehåller allt större mängd halvledare, och c) för att maximera möjligheterna för svenska halvledar- och elektronikinnovationer att hävda sig på världsmarknaden, och på så sätt bidra till landets välstånd. Det övergripande målet för Sverige bör vara att använda vår nationella styrka inom innovation som hävstång, och fokusera de starka specialiserade kompetenserna som finns här i landet, jämte långsiktiga investeringar i forskning inom halvledarteknik, systemdesign och halvledarmaterial, i syfte att med samlad kraft nå följande strategiska mål: 1) Etablera Sverige som ett halvledarinnovationsland genom att stärka vårt innovationssystem för halvledare och halvledarmaterial. 2) Få utväxling på de svenska investeringarna i forsknings- och innovationsinfrastruktur för design och produktion av halvledare. 3) Säkra och vidmakthåll en roll för Sverige i halvledarindustrin, inte minst genom svensk representation i de organ och församlingar som beslutar om framtida europeiska investeringar. För att nå dessa mål krävs stark samverkan mellan industri, akademi, institut och offentlig sektor, och långsiktiga såväl publika som privata investeringar i utbildning, forskningsinfrastruktur, test- och demonstrationsanläggningar och i startup- och scaleup-bolag. RISE åsikt är att Sverige därtill bör ta aktiv del i EU-initiativ som den europeiska halvledaralliansen (Alliance on Processor and Semiconductor Technologies) och European Chips Act. Påpekas bör att dessa mål är långsiktiga och kräver kontinuerligt arbete och finansiering under många år framöver. De löser inte industrins kortsiktiga behov av halvledare, och det kommer att ta tid att säkra industrins behov av halvledarkompetens. Med en väl genomförd strategi skulle dock dessa behov i högre grad kunna tillgodoses samtidigt som vårt lands bidrag till det globala halvledarekosystemet skulle växa kraftigt, till fromma för vårt gemensamma välstånd.

Publisher
p. 23
Series
RISE Rapport ; 2022:14
National Category
Economics
Identifiers
urn:nbn:se:ri:diva-58958 (URN)978-91-89561-29-8 (ISBN)
Available from: 2022-03-28 Created: 2022-03-28 Last updated: 2024-06-26Bibliographically approved
Akbari, S., Lövberg, A., Tegehall, P.-E., Brinkfeldt, K. & Andersson, D. (2019). Effect of PCB cracks on thermal cycling reliability of passive microelectronic components with single-grained solder joints. Microelectronics and reliability, 93, 61-71
Open this publication in new window or tab >>Effect of PCB cracks on thermal cycling reliability of passive microelectronic components with single-grained solder joints
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2019 (English)In: Microelectronics and reliability, ISSN 0026-2714, E-ISSN 1872-941X, Vol. 93, p. 61-71Article in journal (Refereed) Published
Abstract [en]

Lead-free tin-based solder joints often have a single-grained structure with random orientation and highly anisotropic properties. These alloys are typically stiffer than lead-based solders, hence transfer more stress to printed circuit boards (PCBs) during thermal cycling. This may lead to cracking of the PCB laminate close to the solder joints, which could increase the PCB flexibility, alleviate strain on the solder joints, and thereby enhance the solder fatigue life. If this happens during accelerated thermal cycling it may result in overestimating the lifetime of solder joints in field conditions. In this study, the grain structure of SAC305 solder joints connecting ceramic resistors to PCBs was studied using polarized light microscopy and was found to be mostly single-grained. After thermal cycling, cracks were observed in the PCB under the solder joints. These cracks were likely formed at the early stages of thermal cycling prior to damage initiation in the solder. A finite element model incorporating temperature-dependant anisotropic thermal and mechanical properties of single-grained solder joints is developed to study these observations in detail. The model is able to predict the location of damage initiation in the PCB and the solder joints of ceramic resistors with reasonable accuracy. It also shows that the PCB cracks of even very small lengths may significantly reduce accumulated creep strain and creep work in the solder joints. The proposed model is also able to evaluate the influence of solder anisotropy on damage evolution in the neighbouring (opposite) solder joints of a ceramic resistor.

Keywords
Anisotropy of tin grains, Finite element modelling, Lead-free soldering, Passive components, PCB cracking, Anisotropy, Ceramic materials, Cracks, Creep, Electronics packaging, Finite element method, Mechanical properties, Microelectronics, Printed circuit boards, Resistors, Soldering, Thermal cycling, Accelerated thermal cycling, Microelectronic components, Printed circuit board (PCBs), Thermal and mechanical properties, Thermal cycling reliability, Lead-free solders
National Category
Natural Sciences
Identifiers
urn:nbn:se:ri:diva-37331 (URN)10.1016/j.microrel.2019.01.006 (DOI)2-s2.0-85059773183 (Scopus ID)
Note

Funding details: VINNOVA, 2015-01420; Funding details: Swedish Insitute, SI; Funding text 1: This work has been conducted within the Swedish national project "Requirements, specification and verification of environmental protection and life of solder joints to components" supported by the Swedish Governmental Agency for Innovation Systems (Vinnova) under contract 2015-01420 .

Available from: 2019-01-22 Created: 2019-01-22 Last updated: 2023-05-25Bibliographically approved
Brinkfeldt, K., Wetter, G., Lövberg, A., Tegehall, P.-E., Andersson, D., Strandberg, J., . . . Kwarnmark, M. (2019). Feasibility of Printed Circuit Board-Integrated Vibration Sensors for Condition Monitoring of Electronic Systems. Journal of Electronic Packaging, 141(3), Article ID 031010.
Open this publication in new window or tab >>Feasibility of Printed Circuit Board-Integrated Vibration Sensors for Condition Monitoring of Electronic Systems
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2019 (English)In: Journal of Electronic Packaging, ISSN 1043-7398, E-ISSN 1528-9044, Vol. 141, no 3, article id 031010Article in journal (Refereed) Published
Abstract [en]

The increasing complexity of electronics in systems used in safety critical applications, such as self-driving vehicles, requires new methods to assure the hardware reliability of the electronic assemblies. Prognostics and health management (PHM) that uses a combination of data-driven and physics-of-failure models is a promising approach to avoid unexpected failures in the field. However, to enable PHM based partly on physics-of-failure models, sensor data that measure the relevant environment loads to which the electronics are subjected during its mission life are required. In this work, the feasibility to manufacture and use integrated sensors in the inner layers of a printed circuit board (PCB) as mission load indicators measuring impacts and vibrations has been investigated. A four-layered PCB was designed in which piezoelectric sensors based on polyvinylidenefluoride-co-trifluoroethylene (PVDF-TrFE) were printed on one of the laminate layers before the lamination process. Manufacturing of the PCB was followed by the assembly of components consisting of ball grid arrays (BGAs) and quad flat no-leads (QFN) packages in a standard production reflow soldering process. Tests to ensure that the functionality of the sensor material was unaffected by the soldering process were performed. Results showed a yield of approximately 30% of the sensors after the reflow soldering process. The yield was also dependent on sensor placement and possibly shape. Optimization of the sensor design and placement is expected to bring the yield to 50% or better. The sensors responded as expected to impact tests. Delamination areas were present in the test PCBs, which requires further investigation. The delamination does not seem to be due to the presence of embedded sensors alone but rather the result of a combination of several factors. The conclusion of this work is that it is feasible to embed piezoelectric sensors in the layers of a PCB.

Place, publisher, year, edition, pages
American Society of Mechanical Engineers (ASME), 2019
Keywords
Automobile electronic equipment, Automobile manufacture, Ball grid arrays, Condition monitoring, Electric sensing devices, Integrated circuit manufacture, Piezoelectric devices, Piezoelectric transducers, Piezoelectricity, Printed circuit manufacture, Safety engineering, Soldering, Timing circuits, Electronic assemblies, Hardware reliability, Physics of failure models, Piezoelectric sensors, Polyvinylidene fluorides, Printed circuit boards (PCB), Prognostics and health managements, Safety critical applications, Printed circuit boards
National Category
Natural Sciences
Identifiers
urn:nbn:se:ri:diva-39053 (URN)10.1115/1.4043479 (DOI)2-s2.0-85066848439 (Scopus ID)
Note

 Funding details: 2017-03552; Funding details: Energimyndigheten; Funding details: Svenska Forskningsrådet Formas; Funding text 1: This work has been supported by the Strategic Innovation Program Smarter Electronic Systems under Contract No. 2017-03552. The program is a joint venture of Sweden’s Innovation Agency (Vinnova), the Swedish Research Council Formas and the Swedish Energy Agency.

Available from: 2019-06-26 Created: 2019-06-26 Last updated: 2024-03-22Bibliographically approved
Brinkfeldt, K., Wetter, G., Lövberg, A., Andersson, D., Toth-Pal, Z., Forslund, M. & Shisha, S. (2018). Failure mechanism assessment of TO-247 packaged SiC power devices. In: ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018: . Paper presented at ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018, 27 August 2018 through 30 August 2018. , Article ID V001T04A016.
Open this publication in new window or tab >>Failure mechanism assessment of TO-247 packaged SiC power devices
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2018 (English)In: ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018, 2018, article id V001T04A016Conference paper, Published paper (Refereed)
Abstract [en]

As the automotive industry shifts towards the electrification of drive trains, the efficiency of power electronics becomes more important. The use of silicon carbide (SiC) devices in power electronics has shown several benefits in efficiency, blocking voltage and high temperature operation. In addition, the ability of SiC to operate at higher frequencies due to lower switching losses can result in reduced weight and volume of the system, which also are important factors in vehicles. However, the reliability of packaged SiC devices is not yet fully assessed. Previous work has predicted that the different material properties of SiC compared to Si could have a large influence on the failure mechanisms and reliability. For example, the much higher elastic modulus of SiC compared to Si could increase strain on neighboring materials during power cycling. In this work, the failure mechanisms of packaged Si- and SiC-based power devices have been investigated following power cycling tests. The packaged devices were actively cycled in 4.5 s heating and 20 s cooling at ΔT = 60 - 80 K. A failure analysis using micro-focus X-ray and scanning acoustic microscopy (SAM) was carried out in order to determine the most important failure mechanisms. The results of the analysis indicate that the dominant failure mechanism is wire bond liftoff at the device chip for all of the SiC-based devices. Further analysis is required to determine the exact failure mechanisms of the analyzed Si-based devices. In addition, the SiC-based devices failed before the Si-based devices, which could be a result of the different properties of the SiC material.

Keywords
Automotive industry, Efficiency, Electric railroads, Electronics industry, Electronics packaging, Failure (mechanical), High temperature operations, Microsystems, Outages, Silicon carbide, Blocking voltage, Failure mechanism, Higher frequencies, Lower switching loss, Power cycling tests, Scanning Acoustic Microscopy, Si-based devices, Silicon carbides (SiC), Power semiconductor devices
National Category
Natural Sciences
Identifiers
urn:nbn:se:ri:diva-37000 (URN)10.1115/IPACK2018-8385 (DOI)2-s2.0-85057279573 (Scopus ID)9780791851920 (ISBN)
Conference
ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018, 27 August 2018 through 30 August 2018
Note

 Funding details: Energimyndigheten, 2017-001699;

Available from: 2019-01-08 Created: 2019-01-08 Last updated: 2023-05-25Bibliographically approved
Brinkfeldt, K., Wetter, G., Lövberg, A., Tegehall, P.-E., Andersson, D., Goncalves, J., . . . Kwarnmark, M. (2018). Feasibility of PCB-integrated vibration sensors for condition monitoring of electronic systems. In: ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018: . Paper presented at ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018, 27 August 2018 through 30 August 2018.
Open this publication in new window or tab >>Feasibility of PCB-integrated vibration sensors for condition monitoring of electronic systems
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2018 (English)In: ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018, 2018Conference paper, Published paper (Refereed)
Abstract [en]

The increasing complexity of electronics in systems used in safety critical applications, such as for example self-driving vehicles requires new methods to assure the hardware reliability of the electronic assemblies. Prognostics and Health Management (PHM) that uses a combination of data-driven and Physics-of-Failure models is a promising approach to avoid unexpected failures in the field. However, to enable PHM based partly on Physics-of-Failure models, sensor data that measures the relevant environment loads to which the electronics is subjected during its mission life are required. In this work, the feasibility to manufacture and use integrated sensors in the inner layers of a printed circuit board (PCB) as mission load indicators measuring impacts and vibrations has been investigated. A four-layered PCB was designed in which piezoelectric sensors based on polyvinylidenefluoride-co-trifluoroethylene (PVDF-TrFE) were printed on one of the laminate layers before the lamination process. Manufacturing of the PCB was followed by the assembly of components consisting of BGAs and QFN packages in a standard production reflow soldering process. Tests to ensure that the functionality of the sensor material was unaffected by the soldering process were performed. Results showed a yield of approximately 30 % of the sensors after the reflow soldering process. The yield was also dependent on sensor placement and possibly shape. Optimization of the sensor design and placement is expected to bring the yield to 50 % or better. The sensors responded as expected to impact tests. Delamination areas were present in the test PCBs, which requires further investigation. The delamination does not seem to be due to the presence of embedded sensors alone but rather the result of a combination of several factors. The conclusion of this work is that it is feasible to embed piezoelectric sensors in the layers of a PCB.

Keywords
Automobile electronic equipment, Automobile manufacture, Condition monitoring, Electric sensing devices, Integrated circuit manufacture, Microsystems, Piezoelectric devices, Piezoelectric transducers, Piezoelectricity, Printed circuit manufacture, Safety engineering, Soldering, Electronic assemblies, Physics of failure models, Piezoelectric sensors, Polyvinylidene fluorides, Printed circuit boards (PCB), Prognostics and health managements, Safety critical applications, Self-driving vehicles, Printed circuit boards
National Category
Natural Sciences
Identifiers
urn:nbn:se:ri:diva-36610 (URN)10.1115/IPACK2018-8386 (DOI)2-s2.0-85057248348 (Scopus ID)9780791851920 (ISBN)
Conference
ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2018, 27 August 2018 through 30 August 2018
Available from: 2018-12-06 Created: 2018-12-06 Last updated: 2024-03-22Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-2232-7835

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